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Arbitrary Error Detection in Combinational Circuits by-using Partitioning

机译:使用分区的组合电路中任意错误检测

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The paper presents a new technique for designing a concurrently checking combinational circuit. The technique is based on partitioning the circuit into two independent sub-circuits. It does not require any redundant coding variables; instead, it utilises a sub-set of input variables. These variables are transferred directly into a checker providing the arbitrary-error detection. The paper develops and studies a method for selecting an optimized sub-set of such variables. Benchmark results show efficiency of the proposed approach.
机译:本文介绍了设计同时检查组合电路的新技术。该技术基于将电路划分为两个独立的子电路。它不需要任何冗余编码变量;相反,它利用了一个输入变量的子集。这些变量将直接传输到提供任意错误检测的检查器中。本文开发和研究一种选择这种变量的优化子集的方法。基准结果表明提出的方法的效率。

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