首页> 外文会议>International Baltic ELectronics Conference >Ultra low noise low power LDO design
【24h】

Ultra low noise low power LDO design

机译:超低噪声低功耗LDO设计

获取原文

摘要

A low dropout regulator (LDO) with ultra low output noise is described. The proposed structure of LDO with internal noise filter is discussed and related design problems along with their possible solutions are highlighted. The LDO ensures output noise below 10μV (10Hz to 100kHz) having quiescent current about 25μA for no load. Maximum output current of 100mA is available. The LDO is stable with a 220μF ceramic output capacitor. In testing, PSRR above 75dB (1kHz), dropout below 80mV (Vout>2.5V), and transient peaks below 30mV (1mA ... 80mA output step) were measured. The solution is patent pending and has been introduced to low noise LDO LP5900.
机译:描述了具有超低输出噪声的低丢失调节器(LDO)。讨论了具有内部噪声滤波器的LDO的所提出的LDO结构,并且突出了相关的设计问题以及可能的解决方案。 LDO确保输出噪声低于10μV(10Hz至100kHz),其静态电流约为25μA,无负载。可提供最大输出电流100mA。 LDO与220μF陶瓷输出电容稳定。在测试中,PSRR高于75dB(1KHz),辍学降低80mV(VOUT> 2.5V),并测量低于30mV(1mA ...... 80mA输出步骤)的瞬态峰值。该解决方案是申请专利,并已引入低噪声LP5900。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号