A Numerically Controlled Oscillator Applied to DSSS Transceiver Implemented with FPGA

摘要

A design method of Numerically Controlled Oscillator (NCO) applied to DSSS baseband processor is presented in this paper. Based on iterative algorithm and implemented with FPGA, its final description has been simulated and synthesized as a correct one. Compared with NCO based on look-up table, this design uses less resource, and is easier to implement with FPGA. The NCO designed by this method has been used in DSSS baseband processor.