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Gate dielectrics for advanced semiconductor devices: thermally-grown SiO2 - a very difficult act to follow

机译:高级半导体器件的栅极电介质:热生长的SiO2 - 一种非常困难的行为

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The end of an era has passed, and SiO2 is no longer the gate dielectric of choice for advanced Si devices. This is a direct result of aggressive scaling of the effective oxide thickness, EOT, to below 1.5 nm. 1.5 nm corresponds a physical thickness at which the direct tunneling leakage current for a 1 volt applied bias in excess of flat band exceeds to approximately 1 A-cm'2. This paper provides insights into the reasons why it has proven a formidable challenge to find an alternative dielectric that will significantly reduce the direct tunneling current leakage, whilst at the same time realizing all of the performance and reliability metrics targeted and required for advanced device scaling. Several distinct generations of alternative gate dielectrics are identified, and discussed. Finally, it is demonstrated that scaling of EOT can proceed to at least -0.7 to 0.8 nm in devices utilizing Zr or Hf Si oxynitride gate dielectrics.
机译:过去的结束已通过,SiO2不再是高级SI设备的栅极电介质。这是有效氧化物厚度,EOT至1.5nm以下的积极缩放的直接结果。 1.5 nm对应于用于超过扁平带的1伏施加偏压的直接隧道泄漏电流超过扁平带的直接隧道漏电流超过大约1a-cm'2。本文提供了洞察力,原因是为什么它已经证明了一个强大的挑战,以找到一个替代电介质,可以显着降低直接隧道电流泄漏,同时实现了针对先进的设备缩放所针对的所有性能和可靠性度量和所需的所有性能和可靠性指标。鉴定并讨论了几个不同的几代替代栅极电介质。最后,证明EOT的缩放可以在利用ZR或HF Si氧互氧化物栅电介质的装置中进行至少-0.7至0.8nm。

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