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Effects of Bit Line Coupling on the Faulty Behavior of DRAMs

机译:位线耦合对DRAM缺陷行为的影响

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With the shrinking dimensions of manufactured structures on memory chips and the increase in memory size, bit line coupling is becoming ever more influential on the memory behavior. This paper discusses the effects of bit line coupling on the faulty behavior of DRAMs. It starts with an analytical evaluation of coupling effects, followed by a simulation-based fault analysis using a Spice simulation model. Two bit line coupling mechanisms are identified, pre-sense and post-sense coupling, and found to have a partly opposing effect on the faulty behavior. In addition, the impact of neighboring cells on these coupling mechanisms is investigated.
机译:随着存储器芯片上制造结构的尺寸和内存尺寸的增加,位线耦合在内存行为上变得更具影响力。本文讨论了位线耦合对DRAM故障行为的影响。它从耦合效果的分析评估开始,然后使用Spice仿真模型进行仿真的故障分析。识别出两位线耦合机制,定义和后检测耦合,并发现对故障行为具有部分相反的影响。此外,研究了相邻细胞对这些耦合机构的影响。

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