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Bit-line interconnection scheme for eliminating coupling noise in stack DRAM cell with capacitor under bit-line (CUB) in stand-alone or embedded DRAM
Bit-line interconnection scheme for eliminating coupling noise in stack DRAM cell with capacitor under bit-line (CUB) in stand-alone or embedded DRAM
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机译:位线互连方案,用于消除独立或嵌入式DRAM中具有位线下电容器的堆栈DRAM单元中的耦合噪声
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摘要
A method for forming a stack DRAM cell with CUB wherein coupling noise is eliminated is described. Bit-lines are formed according to one of three methods. In a first method, a first pair of bit-lines is fabricated in a first metal layer and a second pair of bit-lines is fabricated in a second metal layer separated from the first metal layer by an insulating layer wherein the first pair of bit-lines is horizontally spaced from the second pair of bit-lines. In a second method, a first of each pair of bit-lines is fabricated in a first metal layer and a second of each pair of bit-lines is fabricated in a second metal layer separated from the first metal layer by an insulating layer wherein the first of each pair of bit-lines is horizontally spaced from the second of each pair of bit-lines. In a third method, each bit-line is divided into segments. First segments of a bit-line are fabricated in a first metal layer and alternating segments of the bit-line are fabricated in a second metal layer separated from the first metal layer by an insulating layer wherein for each pair of bit-lines, facing segments of a first and second of the bit-line pair are fabricated in different metal layers wherein the first of each pair of bit-lines is horizontally spaced from the second of each pair of bit-lines.
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