首页>
外文会议>International Euro-Par conference
>Automatic Customization of Embedded Applications for Enhanced Performance and Reduced Power Using Optimizing Compiler Techniques
【24h】
Automatic Customization of Embedded Applications for Enhanced Performance and Reduced Power Using Optimizing Compiler Techniques
This paper introduces a compiler framework that optimizes embedded applications written in C, and produces high-level hardware descriptions of the applications for customization on Field-Programmable Gate Arrays (FPGAs). Our compiler performs machine-specific and machine-independent optimizations in order to increase the performance of an embedded application and reduce area/power requirements without explicit programmer intervention. Our experimental results show that our compiler framework can increase performance by 38% with loop and expression parallelism for eight embedded benchmarks. Also, area usage and power consumption are reduced by 69% and 55%, respectively through the efficient utilization of on-chip FPGA resources for Xilinx Virtex-II FPGA chip.
展开▼