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Automatic Customization of Embedded Applications for Enhanced Performance and Reduced Power Using Optimizing Compiler Techniques

机译:使用优化编译技术自动自定义嵌入式应用,以提高性能和降低功耗

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This paper introduces a compiler framework that optimizes embedded applications written in C, and produces high-level hardware descriptions of the applications for customization on Field-Programmable Gate Arrays (FPGAs). Our compiler performs machine-specific and machine-independent optimizations in order to increase the performance of an embedded application and reduce area/power requirements without explicit programmer intervention. Our experimental results show that our compiler framework can increase performance by 38% with loop and expression parallelism for eight embedded benchmarks. Also, area usage and power consumption are reduced by 69% and 55%, respectively through the efficient utilization of on-chip FPGA resources for Xilinx Virtex-II FPGA chip.
机译:本文介绍了一个编译器框架,可优化在C中编写的嵌入式应用程序,并在现场可编程门阵列(FPGA)上产生用于自定义的应用程序的高级硬件描述。我们的编译器执行机器专用和无关的优化,以提高嵌入式应用的性能,并在没有显式编程器干预的情况下降低面积/功率要求。我们的实验结果表明,我们的编译器框架可以将性能提高38%,循环和表达并行性为八个嵌入式基准。此外,通过有效利用Xilinx Virtex-II FPGA芯片的片上FPGA资源,各区域使用和功耗分别减少了69%和55%。

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