Analysis of Gate Misalignment Effect on the Threshold Voltage of Double-Gate (DG) Ultrathin Fully-Depleted (PD) Silicon-Oil-Insulator (SOI) NMOS Devices Using a Compact Model Considering Fringing Electric Field Effect

摘要

This paper reports an analysis of gale misalignment effect on the threshold voltage of double-gate ultrathin fully-depleted (FD) silicon-on-insulator (SOI) NMOS devices using a compact model considering fringing electric field effect above the non-gate overlap region has been derived to provide an accurate prediction of the threshold voltage behavior as verified by the 2D simulation.