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Design and implementation of FIR filter by reconfigurable FPGAs for the multi-wavelength optical storage system

机译:用于多波长光学存储系统的可重新配置FPGA的FIR滤波器的设计与实现

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In the multi-wavelength optical storage system, multiple data streams should be processed simultaneously. Thus a group of symmetric finite impulse response (FIR) filters are designed to meet this requirement. Unlike those conventional ways that FIR filters are implemented by digital signal processing (DSP) microprocessors or application-specific integrated circuits (ASIC), those filters are implemented on a single field programmable gate array (FPGA) integrated chip to obtain an efficient and compact solution. Since FPGAs are reconfigurable, a flexible and cost efficient platform is provided for developing the multi-signal processing subsystem. The paper presents the design and implementation of an FIR filter for the signal-processing platform using the Xilinx's SRAM-based FPGA technology. The structure and the bit serial approach of the FIR filter on an FPGA chip are also presented.
机译:在多波长光学存储系统中,应同时处理多个数据流。因此,设计了一组对称有限脉冲响应(FIR)滤波器以满足此要求。与FIR滤波器由数字信号处理(DSP)微处理器或专用的集成电路(ASIC)实现的传统方式不同,这些过滤器在单场可编程门阵列(FPGA)集成芯片上实现,以获得高效且紧凑的解决方案。由于FPGA是可重构的,因此提供了一种用于开发多信号处理子系统的灵活和成本效率的平台。本文介绍了使用Xilinx基于SRAM的FPGA技术的信号处理平台的FIR滤波器的设计和实现。还提出了FPGA芯片上的FIR滤波器的结构和比特串行方法。

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