Optimized FPGA Implementation of Multi-Rate FIR Filters Through Thread Decomposition This technique is used in design automation and in digital circuit design.

摘要

Multi-rate finite impulse response (MRFIR) filters are among the essential signal-processing components in space-borne instruments where finite impulse response filters are often used to minimize nonlinear group delay and finite-precision effects. Cascaded (multistage) designs of MRFIR filters are further used for large rate change ratio in order to lower the required throughput, while simultaneously achieving comparable or better performance than single-stage designs. Traditional representation and implementation of MRFIR employ polyphase decomposition of the original filter structure, whose main purpose is to compute only the needed output at the lowest possible sampling rate.