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A Direct Digital Frequency Synthesizer based on CORDIC algorithm Implemented with FPGA

机译:基于FPGA实现的CORDIC算法的直接数字频率合成器

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A direct digital frequency synthesizer (DDFS) applied to digital modulation is presented, which can synthesize a 16-bit output sine and cosine wave with a spectrum density of-100dB at 50 MHz. The synthesizer covers a bandwidth from de to 25 MHz in steps of 0.18 Hz with latency of 11 clock cycles. The structure is based on CORDIC algorithm. The whole digital system is implemented with FPGA.
机译:提出了一种应用于数字调制的直接数字频率合成器(DDFS),其可以合成16位输出正弦和余弦波,其频谱密度为-100dB为50MHz。合成器以0.18Hz的步骤覆盖从DE至25MHz的带宽,延迟11个时钟周期。该结构基于Cordic算法。整个数字系统用FPGA实现。

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