An novel low power embedded memory architecture for MPEG-4 applications with mobile devices

摘要

This paper presents a novel embedded memory architecture for MPEGA synthetic video object decoding that is used in a new chipset for third generation mobile phones. The embedded memory architecture stores video frame and motion vectors, then it computes in memory the predicted frame, which generates the MPEG-4 video sequence. The embedded memory is optimized with a parallel reading and writing operations. The architecture has been prototyped in 0.35 im CMOS technology using TSMC standard cells and the Digital Video Processing and Digital VLSI Prototyping (DVP2) group's custom cells.