Dynamically modifiable ciphers using a reconfigurable CAST-128 based algorithm on ATMEL's FPSLIC reconfigurable FPGA architecture

摘要

In this paper we propose an integrated hard-ware/software methodology for the implementation of dynamically reconfigurable cryptoalgorithms with good security properties, on Field Programmable Gate Arrays (FPGAs): we start with a specific cryptoalgorithm implemented on the FPGA and then enable the modification of the only element of the algorithm that lets intact its structure, the substitution boxes. Since the properties of the s-boxes largely determine the properties of the cryptoalgorithm, we provide the architecture of a CAST-128 based cryptoalgorithm whose s-box construction methodology results in s-boxes with good properties. We map this architecture on ATMEL's innovative processor+FPGA chip FPSLIC where the cryptoalgorithm is implemented on the FPGA part while the s-box construction algorithm runs on the processor part (AVR). The result is a one chip fast and secure cryptoalgorithm than can reconfigure itself at run time, either autonomously at regular time intervals or upon receipt of an external signal in order to hinder or confuse suspected cryptanalytic efforts.