We present the design of robust space compactors for reducing test data volume. These compactors are totally error-propagating for a given test set, i.e. all possible errors are propagated irrespective of the fault model. In addition, these compactors also provide a high degree of error propagation for other test sets. All errors that affect upto three outputs of the circuit under test, as well as all errors that affect an odd number of outputs, are detected. This is irrespective of the test set or the fault model. The number of compactor outputs grows very slowly with the number of circuit outputs and size of the test set. Finally, no structural information of the circuit under test is required for fault simulation. We present experimental results on compactor design for a set of ISCAS and ITC-99 benchmark circuits.
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