CMOS floating gate defect detection using I{sub}(DDQ) test with power supply superposed by AC component

摘要

In this paper, we propose a new I{sub}(DDQ) test method for detecting floating gate defects in CMOS ICs. In the method, unusual increase of the supply current caused by defects is promoted by superposing an AC component on the DC power supply. Feasibility of the test is examined by some experiments on four DUTs with an intentionally caused defect. The results showed that our method could detect clearly all the defects, one of which may be detected by neither any functional logic test nor any conventional I{sub}(DDQ) test.