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Extended ATHENA~(TM) alignment performance and application for the 100 nm technology node

机译:扩展雅典娜〜(TM)对齐性能和100nm技术节点的应用

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摘要

Applying current and forthcoming optical lithography Step & Scan systems for IC manufacturing with 100 nm device resolution requires constant reduction of the relevant product overlay contributors. The system's wafer alignment sensor plays a key role in determining the attainable product overlay. In this paper, it is shown that modulating the phase of the coherent illumination sources of a phase-grating alignment system improves measurement repeatability. This reduces the single-machine overlay contribution. In addition, by using extended functionality and new procedures to elucidate the optimal wafer alignment strategy, it is shown that the alignment system can resist advanced IC processing effects on alignment marks. This means that a further reduction of the process-induced overlay contribution can be accomplished.
机译:应用电流和即将举行的光学光刻步骤和扫描系统,具有100nm器件分辨率的IC制造需要持续减少相关产品覆盖贡献者。系统的晶片对准传感器在确定可获得的产品覆盖层时起着关键作用。在本文中,示出了调制相位光栅对准系统的相干照射源的相位改善了测量可重复性。这减少了单机覆盖贡献。另外,通过使用扩展功能和新程序来阐明最佳晶片对准策略,示出了对准系统可以对对准标记抵抗高级IC处理效果。这意味着可以实现进一步减少过程诱导的覆盖贡献。

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