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SILICON ON NOTHING (SON) - FABRICATION, MATERIAL AND DEVICES

机译:硅上没有(儿子) - 制造,材料和装置

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The key point of the new SON process lies in the transfer of the lattice continuity from a bulk Silicon substrate via a SiGe layer to the Silicon cap layer, both of these layers being obtained by epitaxy. The thin SiGe layer is next removed from underneath the Si cap in an isotropic plasma-assisted chemical dry-etching that guaranties selectivity factors as large as 100:1. The mono-crystalline Si cap layer resulting from this process lies on an air-gap, which gives the name (Silicon On Nothing) to the process. Depending on application, this air-gap may be refilled with a dielectric or left empty. In both cases, the thickness of the Si cap as well as that of the air-gap (dielectric) may be in the range of a few nanometers with a control of less than 1nm. Such specifications on Si cap and buried dielectric layer thickness are out of reach of any known SOI substrate technology, thus opening access to new applications. In the paper we will present the SON process and a large spectrum of applications ranging from MOS SOI and GAA transistors, to notched gates, DRAM capacitors, 3-D integration, etc.
机译:新的SON过程的关键点在于通过SiGe层将晶格连续性从块状硅衬底转移到硅盖层,这两层都通过外延获得。接下来,在各向同性等离子体辅助化学干蚀刻中从Si帽下方取出薄的SiGe层,以保证大约100:1的选择性因子。由该过程产生的单晶Si帽层位于空气间隙上,这使得名称(无所作为)到该过程。根据应用,可以用电介质或左空空格重新填充该气隙。在这两种情况下,Si帽的厚度以及空气间隙(电介质)的厚度可以在少数纳米的范围内,该控制的控制小于1nm。 Si盖和掩埋介电层厚度的这种规范超出了任何已知的SOI基板技术的覆盖范围,从而开口进入新应用。在此文中,我们将介绍儿子流程和来自MOS SOI和GaA晶体管的大型应用,到缺口闸门,DRAM电容器,3-D集成等。

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