This paper describes a new method for the concurrent detection of faults in instruction level parallel (ILP) processors. This method makes use of the No Operation (NOP) instruction's slots that sometimes fill some of the pipelines (stages) in an ILP processor. We show the practical application of this method to a superscalar RISC processor. For this processor, branch addresses, execution of certain instructions (store/load) and resource conflicts that force the inclusion of NOPs, are the cases exploited to test its pipelines. The NOPs are replaced by an effective instruction running in another pipeline. This allows the checking of the processor's pipelines by the comparison of the outputs of their stages during the execution of the replicated instruction.
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