A Mixed-Signal CMOS MODEM ASIC for Data Transmission on the Low-Voltage Power-Line with Sensitivity of 283μVrms at 10Kbps

摘要

This paper presents a CMOS 0.8 μm mixed-signal half-duplex MODEM ASIC for data transmission on the low-voltage power line. This circuit includes all the analog circuitry needed for input interfacing and modulation/ demodulation (input amplifier, PLL-based frequency synthesis, slave filter banks with PLL master VCO for tuning, and decision circuitry) plus the logic circuitry needed for control purposes, and an output amplifier used as front-end for an off-chip line driver. The chip demodulates signals down to 283μVrms at 10kbps, and operates correctly in the whole industrial temperature range, from ―45 to 80°C, under 5% variations of the 5V supply voltage. This ASIC, which is now in commercial production, has better performance and smaller power consumption than previous commercial low-voltage power-line MO-DEMs.