A modem in CMOS technology for data communication on the low-voltage power line

摘要

This paper presents a CMOS 0.8 μm mixed-signal half-duplex Modem ASIC for data transmission on the low-voltage power line. It includes all the analog circuitry needed for input interfacing and modulation/demodulation (low-noise amplifier, PLL-based frequency synthesis, tunable filter banks, and decision circuitry), logic circuitry for control purposes, and an output amplifier used as front-end for an off-chip line driver. The chip demodulates signals down to 283μVrms (these are worst case values among 30 randomly-selected samples used as vehicles for detailed electrical characterization; most of the samples featured 200 μVrms sensitivity; bit error rate (BER) is below 0.5×10-5) at 10kbps, and operates correctly in the whole industrial temperature range, from -45°C to 80°C, under 5% variations of the 5V supply voltage. This ASIC is now in commercial production. © 2003 Elsevier B.V.