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A design for modular exponentiation coprocessor in mobile telecommunication terminals

机译:移动电信终端中模块化指数协处理器的设计

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Following requirements are necessary when implementing public key cryptography in a mobile telecommunication terminal. (1) simultaneous high-speed double modular exponentiation calculation, (2) small size and low power consumption, (3) resistance to side channel attacks. We have developed a coprocessor that provides these requirements. In this coprocessor, right-to-left binary exponentiation algorithm was extended for double modular exponentiations by designing new circuit configuration and new schedule control methods. We specified the desired power consumption of the circuit at the initial design stage. Our proposed method resists side channel attacks that extract secret exponent by analyzing the target's power consumption and calculation time.
机译:在移动电信终端在移动电信终端中实现公钥加密时,需要以下要求。 (1)同时高速双模调指数计算,(2)小尺寸和低功耗,(3)抗侧通道攻击。我们开发了一个提供这些要求的协处理器。在这种协处理器中,通过设计新的电路配置和新的调度控制方法,扩展了左右二进制指数算法。我们在初始设计阶段指定了电路的所需功耗。我们所提出的方法通过分析目标的功耗和计算时间来抵抗提取秘密指数的侧通道攻击。

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