Post-Etch Residue Removal for Advanced Copper/Low-κ Devices Utilizing A Metal Hardmask Integration Scheme

摘要

The drive to minimize the RC delay in logic copper/low-k interconnect requires new material strategies. Implementation of porous low-k films in 45nm and beyond has created a need for new integration approaches in order to maintain a lower overall k value (k{sub}(eff)). One such approach is to use TiN metal hardmask as an etching mask, thus gaining better etching selectivity to the porous low-k materials during plasma fabrication process. However, with TiN metal hardmask applications, heavy plasma etching residues are generated and are very challenging to remove. We have developed a chemical removal product that successfully removes these etching residues. The defect and electrical via chain yield tests in the customer site show that defect particles are less than 50 per wafer, and via chain yield is greater than 90%. The chemicals cleaning mechanism and test results will be discussed in this paper.