首页> 外文会议>International symposium on silicon materials science and technology >GATE-CONTROLLED PN JUNCTION LEAKAGE CURRENT FOR WIDE RANGE OF PERIMETER-TO-AREA RATIOS ―AN INCREASE IN THE LEAKAGE CURRENT CAUSED BY DEFECTS RELATED TO OXYGEN PRECIPITATION AND ITS TEMPERATURE DEPENDENCE―
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GATE-CONTROLLED PN JUNCTION LEAKAGE CURRENT FOR WIDE RANGE OF PERIMETER-TO-AREA RATIOS ―AN INCREASE IN THE LEAKAGE CURRENT CAUSED BY DEFECTS RELATED TO OXYGEN PRECIPITATION AND ITS TEMPERATURE DEPENDENCE―

机译:栅极控制的PN结漏电流为宽范围的周边对面积的比率-AN增加由氧气沉淀有关的缺陷引起的漏电流及其温度依赖性 -

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摘要

We investigated a temperature dependence of area component of leakage current for pn junctions fabricated on CZ-Si wafers with different thermal history. To separate area component from the total leakage current gate-controlled pn junction diodes with wide range of perimeter-to-area ratios were studied. Bulk micro defects (BMD) were created inside CZ-Si wafers during prefabrication heat treatments and pn junction fabrication process itself. TEM and Wright etching methods were applied to investigate the size, density and shape of BMDs under the pn junction regions after leakage current measurements. The diffusion component of area leakage current was dominant for the temperature range T>60°C and was strongly affected by the size and density of BMDs. The generation component of area leakage current was proportional to the surface area of oxide precipitates.
机译:我们调查了在CZ-Si晶片上制造的PN结具有不同热历史的PN结区域分量的温度依赖性。研究了从总漏电电流栅极控制的PN结二极管的分开,研究了具有广泛的周边到面积的比率。在预制热处理期间在CZ-Si晶片内部产生散装微缺陷(BMD)和PN结制造过程本身。应用TEM和赖特蚀刻方法以在漏电流测量后的PN接合区域下的BMDS尺寸,密度和形状。面积漏电流的扩散分量对于温度范围T> 60℃的显性,并且受到BMD的尺寸和密度的强烈影响。区域泄漏电流的产生分量与氧化物沉淀物的表面积成比例。

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