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Packaged clock recovery integrated circuits for 40 Gbit/s optical communication links

机译:包装时钟恢复集成电路40 Gbit / s光通信链路

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Three packaged clock recovery integrated circuits: a differentiate/rectify circuit, a delay/multiply circuit, and a phase detector circuit, were implemented in an advanced AlGaAs-GaAs HBT process. The packaged ICs show performance adequate for clock recovery for optical communication links of up to at least 40 Gbit/s. With a 30 Gbit/s pseudo-random sequence input, a phase-locked loop incorporating these ICs readily acquired and maintained phase lock, demonstrating the excellent system performance of these components.
机译:三个封装时钟恢复集成电路:在高级AlgaAs-GaAs HBT过程中实现了差分/零电路,延迟/乘电路和相位检测电路。封装的IC显示出足够的性能,用于最高可达40 Gbit / s的光通信链路的时钟恢复。采用30 Gbit / s伪随机序列输入,锁相环包含这些IC,易于获取和维护锁相,展示了这些组件的优异系统性能。

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