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PHASE NOISE ANALYSIS OF AN IMPROVED DISCRETE-TIME PHASE-LOCKED LOOP WITH LOOP DELAY

机译:循环延迟改进离散时间锁相环的相位噪声分析

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Due to the noises in the transmission channel of communication system and the vibration of equipment, the phase and frequency of the signal received by the receiver differs from that of the original signal. It is important to reduce those phase noise and frequency noise. This paper presents the structure of an improved discrete-time phase-locked loop (PLL) with loop delay to reduce both phase and frequency noise. A detailed theoretical analysis of this PLL is presented. The analysis emphasizes the phase noise performance. The main results are comparisons with three other kinds of PLLs in the area of performance of reducing phase and frequency noise. Simulation results are illustrated via graphics and tables.
机译:由于通信系统的传输信道中的噪声和设备的振动,由接收器接收的信号的相位和频率与原始信号的相差不同。重要的是减少那些相位噪声和频率噪声。本文介绍了具有环路延迟的改进的离散时间锁相环(PLL)的结构,以减少相位和频率噪声。提出了对该PLL的详细理论分析。分析强调相位噪声性能。主要结果是在降低相位和频率噪声的性能方面与三种其他类型的PLL比较。仿真结果通过图形和表格说明。

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