High speed 8:1 multiplexer and 1:8 demultiplexer ICs using GaAs DCFL circuit

摘要

An 8:1 multiplexer and 1:8 demultiplexer chip set composed of GaAs direct-coupled FET logic (DCFL) has been designed and fabricated. The circuits were designed with tree type architecture and used memory cell type flip-flop (MCFF) as a flip-flop. Self-aligned GaAs MESFETs with a gate length of 0.5 mu m were used in these ICs. Both circuits operated up to 8 Gb/s with power dissipations of 1.5 W for the multiplexer and 1.9 W for the demultiplexer at a single power supply voltage of 2.0 V.