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On-Chip Millimeter-Wave Library Device - Scalable Wilkinson Power Divider/Combiner

机译:片上毫米波库装置 - 可扩展的Wilkinson Power Divider / Combiner

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On-chip millimeter wave Wilkinson power divider has been developed with the Back End of Line (BEOL) wiring and enabled as a library device in a 0.13μm BiCMOS Process Design Kit. The device layout and model are fully scalable, i.e. users can design a power divider at different frequencies or in different reference characteristic impedance systems by inputting the dimensions. Excellent model and hardware correlation has been observed up to 110GHz. The measured results show that very good performance on-chip Wilkinson power dividers have been obtained in this technology, such as less than about 0.1dB amplitude imbalance, about 0.8dB of insertion loss with bandwidth of about 15% of the design frequency (defined at 15dB return loss level) and about 20dB of isolations. In addition, the device is the Design Rule Check (DRC) clean and the Layout versus Schematic (LVS) enabled, which help to shorten the design cycle.
机译:片上毫米波Wilkinson Power Divider已通过Line(BEOL)接线的后端开发,并以0.13μmBICMOS工艺设计套件为单位的库设备。设备布局和型号是完全可扩展的,即用户可以通过输入尺寸在不同频率或不同的参考特性阻抗系统中设计功率分频器。优异的模型和硬件相关性已被观察到高达110GHz。测量结果表明,在该技术中获得了非常好的性能片上芯片电力分频器,例如小于约0.1dB的幅度不平衡,约为0.8dB的插入损耗,带宽为设计频率约为15%(定义15dB退回损耗水平)和大约20dB的分离。此外,该设备是设计规则检查(DRC)清洁,并且启用了布局与原理图(LVS),有助于缩短设计周期。

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