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Improvement of dielectric strength of TiSix-polycide-gate system by using rapidly nitrided oxides

机译:通过快速氮化氧化物改善TISIX-聚合栅系统介电强度

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摘要

Silicide gates are expected for application to high-speed VLSI's. TiSix/thin poly-Si structures were chosen for this study to realize low-resistive gates. For the purpose, the poly-Si sublayer should be as thin as possible. For 0.5??m CMOS technology, gate oxides are required to be as thin as 10 nm.
机译:预期硅化物门用于高速VLSI的应用。选择TISIX /薄的多Si结构用于本研究以实现低电阻栅极。为此,Poly-Si子层应尽可能薄。对于0.5?M CMOS技术,需要栅极氧化物,如10nm一样薄。

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