The architecture of a multicomputer system with switchable main memory modules (SM3) is presented. This architecture supports the efficient execution of parallel algorithms for non-numeric processing by 1) allowing the sharing of switchable main memory modules between computers, 2) supporting network partitioning, and 3) employing global control lines to efficiently support inter-processor communication. By allowing some main memory modules to be switched between processors, the data transfer time is reduced to memory switching time. Network partitioning gives a common bus network system the capability of a MIMD machine while performing global operations. The global control lines establish a quick and efficient high-level protocol in the system. The network is supervised by a Control Computer which oversees network partitioning and other global functions. The hardware involved is quite simple and the network is easily extensible. An analytical study using parallel algorithms for common database operations has been carried out to compare the SM3 System with several other architectures. The results of the study are presented.
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