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Signal Integrity Simulation Design and Analysis of Electronic Article Surveillance PCB for RFID applications

机译:RFID应用中电子产品监控PCB信号完整性仿真设计与分析

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The modern electronics industry is working for miniaturization of electronic devices will ultimately call for the dense design of PCB, shrinking geometry of ICs and high speed interference. Mostly communication devices operate on low power and high frequency. As shrinking of the silicon wafer area significantly increases the interconnection problems. Crosstalk, impedance mismatch, reflection, skew, and propagation delay are major issues that are caused by interconnection and limit the performance of the high-speed design. This paper presents Signal Integrity (SI) simulation design analysis by using Cadence Allegro SPB Software. For this purpose, Input/Output Buffer Information Specification (IBIS) models are assigned to simulate reflection and crosstalk. Signal integrity analysis is performed and improvement in simulation design is presented which enhances the design intuitively and validates high speed PCB analysis.
机译:现代电子行业正在为电子设备的小型化工作,最终将呼吁PCB的密集设计,收缩IC的几何形状和高速干扰。主要是通信设备在低功率和高频上运行。随着硅晶片区域的收缩显着增加互连问题。串扰,阻抗不匹配,反射,偏移和传播延迟是由互连引起的主要问题,并限制高速设计的性能。本文通过使用Cadence Allegro SPB软件介绍了信号完整性(SI)仿真设计分析。为此目的,分配输入/输出缓冲区信息规范(IBIS)模型以模拟反射和串扰。执行信号完整性分析,提高了仿真设计的改进,其直观地增强了设计,并验证了高速PCB分析。

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