Pipelined TSPC barrel shifter with scan test facilities for VLSIimplementation of high speed DSP applications

摘要

A barrel shifter for high speed data processing is described,together with the test-oriented structure which it has been providedwith. The circuit has a pipeline architecture and has been designedusing the TSPC strategy, which has allowed the achievement of a highoperation rate. Its implementation has been carried out in full-customstyle with 1.5 μm CMOS technology. The incorporated test-orientedstructure allows serial acquisition of output data using the normal modeinstruction register