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Flipped Voltage Follower Based Low Dropout (LDO) Voltage Regulators: A Tutorial Overview

机译:基于翻转电压跟随器的低压降(LDO)稳压器:教程概述

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This tutorial introduces flipped voltage follower (FVF) based low dropout voltage regulators (LDOs) and their recent advances in the literature. Conventional off-chip output capacitor LDOs deploy an off-chip output capacitor in the range of hundreds of nanofarads to tens of microfarads with an inherent equivalent series resistance (ESR) in order to attain stability and low overshoot and undershoot during load transients. Because of the large value of the output capacitor, the bandwidth of the LDO is often limited and the transient response is slow. Advancements in System-on-Chips (SoCs) and bill of materials cost often restrict designers from using off-chip components or too many inputoutput (IO) pins. Thus low value integrated on-chip capacitor LDOs are gaining importance. One of the major requirements of on-chip capacitor LDOs is to achieve high bandwidth. An FVF is an analog voltage buffer circuit with fast local feedback. It is capable of sourcing high currents, which makes it ideal candidate for LDOs. Design details such as pole-zero equations, stability, output resistance and transient response of basic and advanced FVF LDOs are discussed in this tutorial. The designs are analyzed with mathematical analysis and simulation results.
机译:本教程介绍了基于翻转电压跟随器(FVF)的低压差稳压器(LDO)及其在文献中的最新进展。常规的片外输出电容器LDO部署了一个具有固有等效串联电阻(ESR)的,范围从数百毫微法拉到数百微法拉的片外输出电容器,以在负载瞬变期间实现稳定性以及低过冲和下冲。由于输出电容器的值较大,因此LDO的带宽通常受到限制,并且瞬态响应很慢。片上系统(SoC)和材料清单成本的提高通常会限制设计人员使用片外组件或过多的输入输出(IO)引脚。因此,低值集成片上电容器LDO变得越来越重要。片上电容器LDO的主要要求之一是实现高带宽。 FVF是具有快速本地反馈的模拟电压缓冲电路。它能够产生大电流,因此非常适合LDO。本教程讨论了基本和高级FVF LDO的设计细节,例如零极点方程,稳定性,输出电阻和瞬态响应。通过数学分析和仿真结果对设计进行分析。

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