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Towards atomic level simulation of electron devices including the semiconductor-oxide interface

机译:迈向包括半导体-氧化物界面的电子设备的原子级仿真

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We report a milestone in device modeling whereby a planar MOSFET with extremely thin silicon on insulator channel is simulated at the atomic level, including significant parts of the gate and buried oxides explicitly in the simulation domain, in ab initio fashion, i.e without material or geometrical parameters. We use the density-functional-based tight-binding formalism for constructing the device Hamiltonian, and non-equilibrium Green's functions formalism for calculating electron current. Simulations of Si/SiO super-cells agree very well with experimentally observed band-structure phenomena in SiO-confined sub-6 nm thick Si films. Device simulations of ETSOI MOSFET with 3 nm channel length and sub-nm channel thickness also agree well with reported measurements of the transfer characteristics of a similar transistor.
机译:我们报告了器件建模方面的一个里程碑,其中,在原子层级上模拟了绝缘体沟道上具有极薄硅的平面MOSFET,包括从头开始的方式(即没有材料或几何形状)在仿真域中明确包括栅极的大部分和掩埋的氧化物。参数。我们使用基于密度泛函的紧束缚形式来构造器件哈密顿量,并使用非平衡格林函数形式来计算电子电流。 Si / SiO超级电池的模拟与在SiO限制的亚6纳米厚Si膜中实验观察到的能带结构现象非常吻合。具有3 nm沟道长度和亚nm沟道厚度的ETSOI MOSFET的器件仿真也与报道的对类似晶体管的传输特性的测量结果非常吻合。

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