A 65nm CMOS Continuous-Time Electro-Optic PLL (CT-EOPLL) with Image and Harmonic Spur Suppression for LIDAR

摘要

An integrated continuous-time electro-optic phase-locked loop (CT-EOPLL) is presented that features image and harmonic spur suppression, and is used in a frequency-modulated continuous-wave (FMCW) LIDAR. The proposed EOPLL has its loop bandwidth equal to its reference frequency, which enables it to relax the trade-off between chirp bandwidth and Mach-Zehnder (MZ) delay and consequently reduce the area and loss associated with the silicon-photonic delay implementation by 10×. Image and harmonic spurs are rejected through single-sideband (SSB) and harmonic-reject (HR) mixing techniques. This EO-PLL is integrated in 65nm CMOS technology, suppresses the highest spur by more than 25dB, and is used in a LIDAR system that can detect an object at ranges exceeding 3.3 meters with an RMS depth precision of 558μm at 2m distance and 9.4mm depth resolution.