Comparative evaluation of Body Biasing and Voltage Scaling for Low-Power Design on 28nm UTBB FD-SOI Technology

摘要

In this paper, we compare the two most common performance tuning techniques: Body-Biasing and Voltage Scaling, when compensating Process, Temperature, and Aging (PTA) variations. We pay special attention to the capability of each technique to improve the worst-case limiting corners that set the product specifications during High Volume Manufacturing (HVM). Results obtained with CAD simulations are validated on silicon with measurements on a 1.4GHz 32-bit ARM? Cortex? with 400kB AXI-memory and ring-oscillator performance monitors fabricated using 28nm FD-SOI technology.