首页> 外文会议>IEEE/ACM International Symposium on Low Power Electronics and Design >A model for array-based approximate arithmetic computing with application to multiplier and squarer design
【24h】

A model for array-based approximate arithmetic computing with application to multiplier and squarer design

机译:基于阵列的近似算术计算模型,应用于乘法器和方块设计

获取原文

摘要

We propose a general model for array-based approximate arithmetic computing to trade off accuracy for significant reduction in energy consumption, which is realized by identifying input signatures for efficient compensation of approximation errors. Under this model, our approximate 16×16 bits fixed-width Booth multiplier consumes 44.96% and 28.33% less energy and area compared with the most accurate fixed-width Booth multiplier. Furthermore, it reduces average error, max error and mean square by 10.46%, 30.77% and 21.26%, respectively, when compared with the best reported approximate design. Using the same approach, significant energy consumption, area and error reduction is achieved for a squarer unit.
机译:我们提出了一种基于阵列的近似算术计算的一般模型,以进行减少精度,以便通过识别用于高效补偿近似误差的输入签名来实现。在此模型下,与最精确的固定宽度展位倍增器相比,我们的近似16×16位固定宽度展位倍增器消耗了44.96%和28.33%的能量和面积。此外,与最佳报告的近似设计相比,它分别将平均误差,最大误差和平均方形降低10.46%,30.77%和21.26%。使用相同的方法,为方块单元实现了显着的能量消耗,区域和误差。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号