Low power device technology with SiGe channel, HfSiON, and poly-Si gate

摘要

We report solutions to the formidable challenges posed by integrating a HfSiON dielectric with a poly-Si gate for low-power device technology. A 1.5 nm EOT HfSiON is demonstrated with mobility comparable to SiO₂ and 3 orders of magnitude leakage reduction. A novel boron delta-doped strained-SiGe channel points a way out of the high threshold voltage problem associated with Fermi-pinning at the high-k/poly-Si interface and ameliorates short-channel effects in PMOS devices. In addition, a 20% hole mobility enhancement and 15% I_on-I_off characteristics improvement are achieved owing to the compressive SiGe channel. NMOS PBTI lifetime of 35 years, and PMOS NBTI and NMOS hot carrier lifetimes of more than 1000 years are demonstrated at 1.2 V.