Why emulating the T805 processor ?The serie of Myriade microsatellites developed by CNES is clearly a success, started with DEMETERlaunched in 2004, PARASOL, PICARD, ESSAIM and many other missions developed by CNES (TARANIS isthe next one) and its partners ASTRIUM and TAS.The avionics architecture of Myriade microsatellites is based onto a centralised architecture and an OBCcomputer connected to all equipments of the platform. The OBC uses a majority of COTS commercialcomponents, managed with specific FDIR functions in order to cope with the radiations constraints. TheIMST805 from INMOS (now ST Microelectronics) was used as the central processor, due to its power andoptimized architecture both for computing and communication. A strategic procurement of criticalcomponents was done at the beginning of the Myriade program, but , due to aging of components (morethan ten years) and huge usage of the stock, it is now difficult to continue manufacturing the OBC boards.The technology has also evolved from 2000, offering integration and increase of performance, as well asnew space processors such as LEON. The LEON processor was first targeted as a replacement of theIMST805, but we did’nt succeeded in making a LEON CPU board replacing the old T805 CPU board, withoutdramatically impacting the software cost already validated and flown. Hopefully, an alternative approach wasexplored in parallel (as a spare). Emulating the original T805 in VHDL was then undertaken, leading now tothe LENA ASIC.A lot of constraints:Emulating the T805 was not obvious due to some concerns:1 no documentation was available, only the 20 pages datasheet, because no more people from ST orINMOS was working on this processor and was available for technical help2 no T805 VHDL was already available3 maintaining the binary compatibility with existent flight software was a major requirement, in ordernot to pay again for a flight-software validation4 an objective was to maintain an ascendant compatibility of the new CPU board with the old one, inorder to use the existent test facilities and system validation benches, with same external interfacesBut some positive facts were present:1 the AED (France) company has already developed their JAP (JAVA) processor for its own purpose,with a similar internal CPU core and a validated IEEE764 FPU simple/double precision. CNES thenhad a contract with AED to start the development of the CPU core and bought a licence to use theFPU, avoiding costly redevelopment.2 the integration level reached by technology progress in the FPGA domain (ACTEL) allowed tointegrate all processor and IO features of the old T805 CPU board into an unique RTAX2000antifuse FPGA. The AX2000 FPGA target was selected at the beginning of the LENA project.3 ATMEL now proposes a low-cost migration path from AX2000 ACTEL FPGA to the ATC18RHAASIC flow4 SDRAM Memory technology was available to increase the memory size and reduce the number ofcomponents , thus increasing the reliability of the CPU board.Technical characteristics of the LENA processor:LENA processor is basically a RISC stack-based processor but it is microcoded, like the T805 transputer forthe complex instructions managing the RT processes and timer queues (this the strength of this processorbecause no OS is needed for multitasking).LENA includes all digital features of the CPU board previously distributed into the T805 processor itself anda companion FPGA RT54SX32 for specific IO interfaces of the OBC computer, basically:1 a 32/64 bits integer unit IU based on register stack A,B,C running at 20MHz (FPGA) or40MHz(ASIC) with an integrated process scheduler trace and LICE interface2 an IEEE764 32/64bits FPU3 an internal RAM TMR vote protected: 8KB when AX2000 and 32KB when ASIC4 4 full-duplex DMA OSlinks running at 5 or 10Mb/s5 A UART DMA for RS485 bus management6 A SDRAM memory controller @ 40MHz with autocorrecting TMR voted and autorefreshed, offering2Gbits ion-immune memory to the user7 A flasheprom serial controller TMR protected for flight software code and data storage8 All IOs needed for being compatible with the T805 board interfaces: I2C busses, GPIOs, LICE,…9 CCSDS TM programmable DMA formatter with Reed-Solomon coder.
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