A low-power ASIC signal processor for a vestibular prosthesis (VP) is reported. Fabricated with TI 0.35 μm CMOS technology and designed to interface with implanted inertial sensors, the digitally assisted analog signal processor operates extensively in the CMOS subthreshold region. During its operation the ASIC encodes head motion signals captured by the inertial sensors as electrical pulses ultimately targeted for in-vivo stimulation of vestibular nerve fibers. To achieve this, the ASIC implements a coordinate system transformation to correct for misalignment between natural sensors and implanted inertial sensors. It also mimics the frequency response characteristics and frequency encoding mappings of angular and linear head motions observed at the peripheral sense organs, semicircular canals and otolith. Overall the design occupies an area of 6.22 mm2 and consumes 1.24 mW when supplied with ± 1.6 V.
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机译：报告了一种用于前庭假体（VP）的低功耗ASIC信号处理器。该数字辅助模拟信号处理器采用TI 0.35μmCMOS技术制造，旨在与植入的惯性传感器接口，可在CMOS亚阈值区域内广泛运行。在其操作过程中，ASIC将惯性传感器捕获的头部运动信号编码为最终针对体内刺激前庭神经纤维的电脉冲。为此，ASIC实施了坐标系统转换，以校正自然传感器和植入式惯性传感器之间的未对准。它还模仿了在周围的感觉器官，半圆形管和耳石上观察到的角和线性头部运动的频率响应特性和频率编码映射。总体上，该设计占用6.22 mm 2 的面积，并在提供±1.6 V电源时消耗1.24 mW。
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