Assessing the quality level of digital CMOS ICs under thehypothesis of nonuniform distribution of fault probabilities

摘要

An extension of the well known defect level model by Williams andBrown has been proposed, to account for non-uniform distribution offault occurrence probabilities. The field experiment reported by Maxwelland Aitken is interpreted in terms alternative (which may also beconsidered complementary) to those provided by the model by Agrawal,Seth and Agrawal. Some simulation experiments show that, for circuitsimplemented in standard cell style, there is a correlation betweenoccurrence probabilities and testability values of SSA and BRI faults