Investigation of Low Temperature Solders to Reduce Reflow Temperature, Improve SMT Yields and Realize Energy Savings

摘要

The miniaturization of electronic devices demands the continued shrinking of system z-height. A significant consequence of these ultra-thin systems is yield loss due to high temperature warpage during SMT reflow. This warpage results from the Coefficient of Thermal Expansion (CTE) mismatch between the key materials, such as Si, organic substrates, and Cu in the SoC-to-PCB system stack up. Warpage impacts the solder joint formation, and can result in both bridging and open defects due to the compressive and expansive forces experienced during solder joint collapse at high temperatures. Solutions typically consist of mechanical reinforcement such as molding compounds or metal stiffeners applied to the substrate, and while successful, these solutions can be expensive. In this study, we investigate the impact of temperature on the system warpage profile and find that reducing the reflow peak temperature from 245C to <180C appreciably reduces the amount of warpage, thus improving SMT yields. To reduce the reflow temperature, we have used Bi-Sn-Ag solder alloys with a M.P. of 138C. Although reduced reflow temperature improves SMT yield, Bi containing solders have been previously shown to induce brittleness [1] that can jeopardize joint reliability. To overcome this, we further investigate a class of Bi-based solders that also contain epoxy resins to mechanically reinforce the solder joint. This paper describes the yield improvements and defect mechanisms as a function of temperature as well as the impact of epoxy based solder reinforcement materials on SMT process yields. Lower reflow temperatures bring added environmental benefits and we have conducted an analysis of the potential energy and cost savings in HVM due to lowering reflow temperatures by 65C-80C.