An analog design methodology taking advantages of design ofexperiments for global optimization purposes is described. Starting withhierarchically based topology, this approach largely reduces simulationcost to reach an efficient result with regards to a user-definedobjective function. The design of a fully BiCMOS low noise amplifier isdetailed as an example: among the roughly 8200 possible combinations,only fifty simulations lead to what might be the best architecture. Atest chip demonstrates the methodology ability to extrapolate highperformance circuits
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