Chip scale polymer stud grid array packaging and reliability basedon low cost flip chip processing

摘要

The Polymer Stud Grid Array (PSGA) package is a new and uniquetype of area array chip package that shows significant advantages overconventional package configurations by virtue of its high potential forminiaturization and process cost saving potential. This package wasdesigned and manufactured in response to a demand for low cost, moderatepin density packages. This paper focuses on two key elements of PSGAtechnology which are: (1) developing a high throughput flip chipassembly process technology for PSGA-CSP configurations using existingSurface Mount Technology (SMT), and (2) qualifying the reliabilityperformance of flip chip PSGA modules. The flip chip interconnectionsystem evaluated is eutectic lead-tin solder. Various flip chipstrategies are screened based on underfill materials and associated flipchip process technology. The underfill materials selected for evaluationare no flow reflowable, fast flow snap cure encapsulants, and highperformance underfill systems. This work discusses issues related todeveloping a robust high throughput flip chip assembly process andpresents preliminary reliability based on liquid to liquid thermalcycling (-55° C to 125° C) of the assembled PSGA Chip ScalePackages (CSPs)