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A Code Generation Algorithm of Crosstalk-Avoidance Code with Memory for Low-Power On-Chip Bus

机译:具有低功耗片上总线的存储器的串扰 - 避免码的代码生成算法

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In this paper, a bus encoding approach including related code generation algorithm for global data busses is developed to produce area-efficient crosstalk-avoidance (CA) codes with considering low-power requirements. Proposed codes are codes with memory using overlapping boundary strategy. The probabilistic distribution of input data could be included to reduce the power consumption. The performance improvement of CA codes is nearly 2x for heavily coupled busses based on theoretical analysis. As compared to uncoded datawords, proposed codes show 12% to 38% energy-reduction on bus for an equi-probable 32-bit bus design.
机译:在本文中,开发了包括全球数据总线相关码生成算法的总线编码方法,以产生考虑低功耗要求的区域有效的串扰 - 避免(CA)代码。所提出的代码是使用重叠边界策略的存储器的代码。可以包括输入数据的概率分布,以降低功耗。基于理论分析,CA代码的性能改进是耦合总线的近2倍。与未编码的DataWords相比,所提出的代码显示出足够可能的32位总线设计的总线减少12%至38%。

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