DC and flicker noise models for passivated single-walled carbon nanotube transistors

摘要

DC and intrinsic low frequency noise properties of p-channel depletion-mode single-walled carbon nanotube field effect transistors (SWCNT-FETs) are investigated. To characterize the intrinsic noise properties a thin atomic layer deposited (ALD) HfO_2 gate dielectric which also works as a passivation layer is used to isolate SWCNT-FETs from environmental factors. The SWCNT-FET devices (a prototypical device with 1 CNT is shown in Fig. 1) are fabricated on Si substrate with a 300nm SiO_2 thermal oxide. Iron catalyst patterns are defined by UV photolithography with a 10μm spacing and subsequent iron deposition and lift-off. Single-walled carbon nanotubes (SWCNTs) are then synthesized by chemical vapor deposition (CVD) of methane on the substrate coated with patterned Iron catalyst. Source and drain contacts separated by 3μm are formed by electron beam deposition of Pd metal. A 20nm high-k HfO_2 film is deposited using ASM Micro-chemistry F-120 ALCVD Reactor at 300°C by using precursor of HfCl_4 and H_2O. Top Gate metal is defined by UV photolithography followed by the deposition of Cr/Au (10/50nm) with a minimum gate length of 1.5 μm. Cr/Au (20/450nm) metal interconnects are finally deposited on top of the source and drain Pd contacts. Fig. 2 shows transfer characteristics (I_d-V_(sg)) of a SWCNT-FET with 1.5μm gate-length and 3μm source-drain separation measured in the ambient environment when V_(sg) is swept from -1.5V to 1V and back to -1.5V. Virtually no hysteresis is observed in the IV characteristics of this device. Figure 3 shows I_d-V_(sd) characteristics of the same device with a maximum on current of 14μA and a maximum transconductance of 6μS at a drain bias of V_(sd) = 1.5V and gate bias of V_(sg) = -0.75V. A drain resistance (R) of 120kΩ due to schottky barrier at the drain contact was extracted from IV curves. Drain current in the linear region was modeled according to I_d = μ_(eff)C_g(V_(sg) + V_t)V_(sd)/(L + Rμ_(eff)C_g(V_(sg) + V_t)) where C_g = 2πε_0ε/cosh~(-1) (1 + h/r) ～ 28aF/nm presuming a cylindrical tube model is the gate capacitance per unit length per number of CNTs in the device structure, L is the gate length, ε_r = 15 is the effective dielectric constant of HfO_2, r = 0.5～2nm is the radius of CNT, h = 20nm is the gate oxide thickness and μ_(eff) is the effective field-effect mobility of holes in SWCNT channel. In the current saturation regime where V_(sd) ≥ V_(sg)+V_t+RI_d, SWCNT-FET has a semi-ballistic transport with a drain current modeled as I_d = K(V_(sg) + V_t)~(3/2)(1 + λV_(sd)), with effective transconductance K = 1.7×10~(-6) [A/V~(1.5)] and channel length modulation parameter λ = 0.2V~(-1) are estimated from the measured data. Linear and saturation models are also shown in Fig. 3. Note that the drain resistance R does not influence the current in the saturation regime, but limits it to large source-drain voltages and small effective source-gate voltages V_(sg) + V_t.