SIR CHARACTERIZATION OF NO-CLEAN FLUX RESIDUES UNDER THE QFN COMPONENT USING DIFFERENT PCB BOARD DESIGN OPTIONS

摘要

Surface Insulation Resistance (SIR) testing has been with the electronics industry since the advent of the transistor and the printed board. SIR has been used to predict long-term failure mechanisms, and as a predictive tool for estimated service life. SIR is a quantitative test method that can be used to test the electrochemical reactions on incoming bare boards, soldering materials, reflow process conditions, no-clean processing parameters, and cleaning process effectiveness. Surface mount components with bottom only terminations are now prevalent, and many types of bottom termination components go by various names. Unlike the more traditional lead frame packaged semiconductors with protruding leads, the BTC devices contain flat pads or terminations on the bottom of the package. BTC packages have two types of solderable areas: (1) I/O solderable pads and (2) thermal pads. BTC packages are leadless, near Chip Scale Package size with a low profile (1.0 mm and less), excellent thermal dissipation and superior electrical performance. Typical BTCs have solderable terminations that are flush with the bottom of the device. QFN components are notorious for trapping flux residues at both the pads and streets outlining the thermal lug. The thermal lug during reflow collapses the component, which results in very low standoff gaps in the range of 25-50um (1-2 mils). Flux residues can bridge both the pad and streets next to the thermal lug. The low standoff can prevent proper outgassing of the flux during reflow. Flux residues trapped under the bottom termination can be active since the Weak Organic Acids within the No-Clean fluxes do not adequately outgas. Flux that does not correctly outgas is ionic and can cause reliability problems, primarily for devices used in hot/humid environments. The purpose of this research is to assess the impacts that solder mask definition and cleaning have on the SIR values of a single row QFN. We will examine the resultant residue state and its impact on four (4) different solder mask configurations. The research will provide preliminary information on solder mask design options that can improve cleanliness and SIR values on the BTC package. Studies of this nature may be valuable in assessing if you need to change your board design (e.g., solder mask definition), process (e.g., cleaning), or materials (e.g., solder flux type).