Fast Characterization of Electrical Fails Overlaying to Inline Defect Inspection During 90nm Copper Logic Technology Development

摘要

The killer defect re-review method enables a fast identification of front end of line (FEOL) failure modes which is one of the keys to shorten yield learning cycles. This paper describes a combination of overlay techniques of electrical and defect inspection data on one hand and semi-automated defect review of electrically failing structures on the other hand. It was used during the 90nm copper logic technology development in a joint project of Infineon Technologies Dresden and PDF Solutions and reduced physical failure analysis needs. A comparison of the overall defect density learning rates (including FEOL and copper back end of line limited yields) during 90nm using this method and 130nm copper logic technology development is given.