A Dual-Loop Digital LDO Regulator with Asynchronous-Flash Binary Coarse Tuning

摘要

This paper presents a dual-loop digital low-dropout regulator (DLDO) with asynchronous-flash (AF) binary coarse tuning for fast transient response. In steady state, the DLDO operates with a unary-weighted low power fine-tune loop to improve the regulation accuracy. Besides, a freeze mode is also employed to further reduce the power budget and to eliminate the limit cycle oscillation phenomenon. When a load-transient is detected, the proposed AF bidirectional shift register will direct the binary-weighted power switches for coarse and fast tuning. The prototype is fabricated in a 28nm bulk CMOS process. With V_in=0.5V and 50mV dropout, the AF-DLDO can deliver 33mA output current and consume only 10.5μA quiescent current. We measured 102mV voltage undershoot for a 30mA/20ns load step, showing a 0.11ps FOM.