A 60 GHz low noise variable gain amplifier with small noise figure and IIP3 variation in a 40-nm CMOS technology

摘要

This paper presents the design and measurement of a low noise variable gain amplifier (VGA) over the frequency band of 57 GHz and 64 GHz, using 40-nm CMOS technology. The design applies an inductive degeneration technique for simultaneously noise and power matching, a layout gate inductance for gain frequency extension, and current steering technique for gain tuning. The comparison of a low noise amplifier (LNA) and a low noise VGA is done, in terms of noise figure and linearity (IIP3). The LNA achieves 6.7 dB gain and 4.3 dB noise figure (NF) at 60 GHz, while consuming 12 mA from a 1.1 V supply. The IIP3 of the LNA is -12.8 dBm. The VGA has an S₂₁of 6.67 dB (maximum) and 5.1 dB NF at 58 GHz. The gain tuning range is 6 dB and the NF deviation is 0.8 dB at 60 GHz and the IIP3 is -7.66 dBm at the maximum gain state. The supply voltage of the VGA is 1.1 V and the DC current is 11 mA.