An accurate subcircuit model of SiC half bridge module for switching loss optimization

摘要

The increasing demand for high power density requires power converter to operate in high switching frequency. SiC power module is regarded as one of the most promising candidates for high-frequency applications due to the superior switching speed and low switching loss. The conventional strategy to optimize switching loss is normally achieved by repetitive double pulse tests, which is time-consuming to find an optimum gate resistance to achieve the trade-off between switching loss and EMI issues. In this work, an accurate SiC module subcircuit model is proposed. It considers the physical behavior of the device and can be directly extracted from the datasheet information. Good agreements are achieved between the PSpice simulation and experimental results in both switching waveform and switching loss. It also provides a guidance for gate driver design with a reasonable accuracy.